The layout design of ADC Comparator ABSTRACT
The layout design of Integrated circuit is an essential design part of manufacturing. It is not only related to the function whether it is corrct or not, but also affect the performance, the cost and the power consumption of Integrated circuit. Because of the raising manufacturing technology, decreasing the size of feature, the affection of the various parasitic parameters is growing. A lot of problems should be considered on the layout design.
In this article, Cadence's Virtuoso custom designing platform makes use of full-custom to design the layout of ADC comparative circuit which uses the cmos technology, inputs the voltage of 2.5 V, samplings the frequency of 125 M, and takes dual-in毕业论文http://www.lwfree.cn put Model which adopts the standard cmos of 90 nm of the Cadence companies, analyzes the performance of circuit and the simulation by the Spectre tools, and completes the layout by the providing craft by Cadence technology companies, analyzes detailedly the process of the layout design ,verifies DRC and LVS with Assura Tools to prove the layout design of this article fully meet the requirements.Key Words：samply and hold circuit； layout design； cmos technology； full-custom.

ABSTRACT II
1.绪论 0
1.1版图的意义 0
1.2版图设计的原因 1
2 A/D 电路介绍 2
2.1 A/D芯片的电路原理 2
2.1.1 闪烁型A/D转换电路 2
2.1.2 电容积分型A、D转换电路 3
2.1.3 逐次逼近型A/D转换电路 3
2.1.4 Σ-△型A/D转换电路 4
2.1.5流水线型A/D转换电路 5
2.2 本文版图设计的A/D电路详情 6
3.版图前准备 7
3.1电路原理图分析 7
4.版图设计方案 10
4.1版图设计工具Virtuoso简介 10
4.2 版图设计的要求 11
4.2.1 布局 11
4.2.2 单元配置 12
4.2.3 布线 12
4.2.4其他注意 13
5.版图设计 14
5.1 CMOS工艺简介 14
5.2 MOS管设计 15
5.2.1 MOS管图形尺寸的设计 15
5.2.1.1 MOS管宽长比(W/L)的确定 15
5.2.1.2 MOS管沟道长度(L)的确定 16
5.2.1.3 MOS管沟道宽度(W)的确定 17
5.2.1.4 MOS管源漏区尺寸的确定 17
5.2.2 MOS管版图 17
5.3 电容版图 19
5.4 电阻版图 20
5.5 CMOS保护环 23
5.6 寄生参数 24
5.7衬底噪声分析 26
5.8天线效应的分析 27
5.9 MOS管的匹配分 27
5.10 模块版图设计 30
5.11 版图 31
6.物理验证 36
6.1 DRC检查 36
6.2 LVS检查 38
7.参数提取和后仿真 40
7.1 参数提取 40
7.2模拟后仿真结果与分析 42
8.总结 44

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